FIGS. 1A and 1B illustrate a prior-art Hybrid Fiber-Coax (HFC) cable system 100 that is compatible with the cable industry standard Data over Cable System Interface Specification (DOCSIS) for providing Internet access to selected cable customers via so called Cable Modems (CMs). FIG. 1A is a top-level view of the cable system. FIG. 1B provides additional detail of the Customer Premises Equipment (CPE) of FIG. 1A. In FIG. 1B, CM 4000 provides a computer industry standard Ethernet interface to PC 5000 and bridges the Ethernet interface with the coax distribution of the cable system. CM 4000 implements both an RF Modulator and an RE Demodulator. These circuits enable digital TDMA burst-modulated communications over dynamically manager upstream and downstream RE channels and in accordance with the DOCIS standard.
An RF Modulator 3000 and RF Demodulator 1000, complementary to those of the cable modem, are implemented in a DOCSIS compatible Cable Modem Termination System (CMTS) 500, which as the name implies, provides termination for the Cable Modem of the CPE. Multiple instances of Modulator 3000 and Demodulator 1000 are provisioned to support those customers having CM service. Control, MAC, Framing 2000 bridges all of the provisioned DOCSIS RF interfaces with one or more packet-based networks. These packet networks may include local area networks, intranets, and the Internet. While FIG. 1A shows the CMTS 500 implemented in a Head End or Primary Hub, theoretically it is possible to implement the CMTS anywhere upstream from the CM. Each demodulator 1000 provides outputs to the Control, MAC, Framing 2000 that include Detected Symbols 1200, and more generally, other status and control signals.
FIG. 2A provides a general conceptual block diagram of the digital burst Demodulator 1000 in the CMTS 500. Front-End 600 isolates one modulated carrier from the carrier multiplex in the Received Spectrum 1100, baseband converts the signal, and passes the resulting signal 1105 to the Burst and Timing Synchronization circuit 1500. (In other contexts the Front-End 600 might be considered as a function prior to, and not part of, the demodulator.) The Recovered Signal Samples 1106, at the output of circuit 1500, are discrete signal samples at the symbol rate (or a multiple thereof). Equalizer 1600 compensates for signal distortion not compensated by the pre-equalizer in the cable modem (CM) and also suppresses ingress noise. At the output of this stage, the Equalized Signal Samples 1107 are not synchronized in terms of carrier phase. This is the task of the Rotator 1700 and Phase Estimator 1900 that follow the Equalizer 1600. Detector 1800 subsequently outputs Detected Symbols 1200.
In burst demodulator applications, such as for the CMTS, the information is conveyed via bursts of symbols. The demodulator must first detect and then decode the bursts. In contrast to analog demodulators, the decode functions are not linear analog circuits that operate continuously, but rather are digital clocked circuits that must be synchronized with the incoming symbols in order to operate. Yet, the symbols are sent asynchronously, in the sense that there is no common clock reference for both the CM and the CMTS. The Burst and Timing Synchronization 1500 of FIG. 2A provides the required burst detection and synchronization and is thus critical to the operation of the demodulator.
The synchronization circuitry 1500 may be further partitioned into coarse timing synchronization and fine timing synchronization. This next level of detail is conceptually illustrated in FIG. 2B. Coarse timing synchronization is also referred to as burst synchronization. Fine timing synchronization is also referred to as symbol timing synchronization or symbol timing recovery.
The role of the coarse timing circuitry is to establish the burst timing to an uncertainty of less than T/2 (0.5 symbol period). The coarse timing circuitry provides the burst timing to the fine timing circuitry and generally to other circuits in the demodulator. Neither the fine timing synchronization, nor the subsequent phase and frequency recovery processes, can be utilized prior to a burst start being detected, as these processes need to be coarse-synchronized with the corresponding CM (for which the demodulator has been provisioned). The role of the fine timing synchronization circuitry is to provide the exact sampling phase necessary for low error rate symbol detection.
In CMTS applications, the coarse timing circuitry must contend with system operation under normal data traffic conditions (traffic mode) and during so-called ranging periods (ranging mode). Ranging is a process by which the CMTS manages the allocation and usage density of time-slots for each of multiple CMs generally assigned to each upstream channel. More specifically, the CMTS uses ranging periods to ascertain the round-trip delay for a specific CM and to subsequently command that CM to operate with a corresponding transmit time-offset. Ranging is performed whenever a CM is initialized and registered by the network and whenever the CMTS suspects that time-slot integrity may have been lost. The ranging calibration process is performed for every CM on the channel and enables the system to smoothly operate at high effective throughput during traffic mode. During subsequent traffic mode operation, from the perspective of the CMTS, the CMs transmit upstream data bursts within their assigned time-slots as though they were all located at a uniform and zero distance from the CMTS.
Ranging periods represent the most problematic operating condition for the CMTS, as the coarse timing circuitry has to reliably (but not falsely) detect bursts that may (or may not) arrive with a huge timing uncertainty (typically up to 3 ms). During traffic mode, the CM is operating with a time slot and delay compensating transmit time-offset, both assigned (and known) by the CMTS as discussed above. Accordingly, the burst timing uncertainty in traffic mode is reduced to time-offset correction errors (typically no greater than 1.1 symbol periods).
As indicated by the switch in FIG. 2B, the coarse timing synchronization circuitry is operated differently in the two operating modes. During ranging, the burst timing is effectively unknown and burst detection is required to initiate frame synchronization. During traffic mode, burst detection is not utilized, and the frame synchronization is initiated using the CMTS's knowledge of the burst timing, gained during the prior ranging period.
Burst detection must be as sensitive as possible, so that demodulation of valid bursts is able to start with the shortest possible delay. Delay in signaling the detection of a valid burst may result in the loss of initial symbols of the burst and more generally requires increased demodulator complexity to prevent or minimize such losses. Moreover, the coarse timing circuitry must have the ability of to reliably distinguish between received noise and received symbol bursts. Two separate error probability indicators characterize this ability. The Nondetection Probability, or Pnd, is the probability that an actually transmitted burst will not be detected. The False Alarm Probability, or Pfa, is the probability of declaring that there is a burst when no burst is actually transmitted. Clearly, smaller error probabilities are better. Pnd must be low and Pfa must be very small.
The time necessary for a CM to become registered by the network during a ranging opportunity is a key concern, as the system must systematically ensure that the CM is detected and demodulated. The mean registration time depends of the probability Pnd, which depends on both the modem performance and the collision probability.
A common method of determining the coarse timing of the start of a ranging burst is the use of power estimation. This is the method shown in FIG. 2B. Generally, this approach performs a long signal integration to estimate the received signal power and compares this estimated power to a predetermined threshold to ascertain if more than thermal noise is present on the channel's carrier frequency. Unfortunately, this method has a number of problems.
Because power estimation bases burst detection on comparing the estimated power with a predetermined threshold, it is undesirably sensitive to power level (i.e., signal-strength) variations associated with different operating conditions (such as variations in attenuation attributable to variations in path lengths). Furthermore, its operation may be compromised by power variations local to the receiver, such as those attributable to the automatic gain control (AGC) of the preceding stages.
Estimation of the received signal power is performed by integrating the instantaneous signal power over a given time window. The integration time (i.e., the duration of the integration window) is a carefully chosen compromise that impacts several key aspects of demodulator performance. Increasing the integration time beneficially reduces the contribution of noise-induced errors in the final power estimate. Unfortunately, increasing the integration time detrimentally increases burst detection latency and reduces the slope of the estimated power function. Increasing burst detection latency requires devoting a larger portion of each burst transmission to the overhead associated with detecting the start of the burst. This increased overhead decreases the effective transmission rate on the upstream channel.
Reducing the slope of the estimated power function reduces the accuracy with which the burst start may be detected. As a consequence, power estimation alone does not deliver a sufficiently accurate indication of burst timing for use in direct synchronization of other demodulator synchronization processes. Some manner of complementary (additional) timing estimation (such as frame synchronization, discussed next) must be relied upon to establish the burst timing with sufficient accuracy to be used as the basis for beginning the other synchronizations.
The frame synchronization circuitry handles smaller timing uncertainties than are required of burst detection. Frame synchronization is always used in traffic mode, and as illustrated, it also may be used in ranging mode to complement (assist) burst detection, The frame synchronization is often implemented by correlation of the received signal with a known preamble. The preamble is specifically chosen such that the position of the first symbol of the burst corresponds to a maximum of the correlation modulus. Typically, some form of time-indexed history buffer retains the most recent correlation moduli. Searching the history buffer within a time window delimited by the power estimation circuitry identifies the correlation maximum.
An approach is needed to burst detection that is superior to power estimation. A burst detection approach is needed that can reliably distinguish between received noise and symbol bursts, with low Pnd and very small Pfa. A burst detection approach is needed that has minimal latency and high accuracy, preferably within T/2, where T denotes the symbol period. (I.e., the reported location of the start of the burst is accurate within one-half symbol period of the actual start of the burst). A burst detection approach is needed that is sensitive to small power transitions, but has reduced dependence on variations in signal level associated with different operating conditions, and is not compromised by local AGC operation. A burst detection approach is needed that minimizes hardware and overall implementation complexity.